|
ADDR |
BANK 0 |
BANK 1 |
ADDR |
|
Special Purpose Registers |
|||
|
0x00 |
Indirect Address |
Indirect Address |
0x80 |
|
0x01 |
TMR0 |
OPTION |
0x81 |
|
0x02 |
PCL |
PCL |
0x82 |
|
0x03 |
STATUS |
STATUS |
0x83 |
|
0x04 |
FSR |
FSR |
0x84 |
|
0x05 |
PORTA |
TRISA |
0x85 |
|
0x06 |
PORTB |
TRISB |
0x85 |
|
0x07 |
-
|
- |
0x87 |
|
0x08 |
EEDATA |
EECON1 |
0x88 |
|
0x09 |
EEADR |
EECON2 |
0x89 |
|
0x0A |
PCLATH |
PCLATH |
0x8A |
|
0x0B |
INTCON |
INTCON |
0x8B |
|
End of Special Purpose Registers |
|||
|
0x0C |
GPR |
Mapped into Bank 0 |
0x8C |
|
0x4D |
Unimplemented Memory Space |
Unimplemented Memory Space |
0xCD |
|
|
BANK 0 |
BANK 1 |
|